![]() ![]() So the Logical Address will be CS:IP or for example FFF0h:C000h. In a normal instruction fetch, the Segment Address is stored in the Code Segment (CS) register and the Offset Address is taken from the Instruction Pointer. ![]() ![]() The combination of the Segment Address with the Offset Address is called the Logical Address, and can be transformed to form the elusive Physical Address. The address within the 64k chunk is found by an Offset Address. The value in a Segment Register, called the Segment Address can be thought of as the base address (0000h) of one of the 64k chunks. In a monumental effort to confuse young budding computer scientists in the late 70’s, Intel broke its 1 meg of address space into four 64k chunks, with each chunk represented by a 16 bit Segment Register. In this article, we are going to go over the basics of how the Physical Address is calculated and how to locate your code correctly in ROM. The process they use can be a bit confusing when trying to figure out where to locate your code in the ROM. Intel solved this riddle by combining two registers so they could make it compatible with code written for the 8008, 8080 & 8085. However, a curious individual would wonder how they can achieve such a feat with only 16 bit registers. There was high demand for the ability to address 1 meg (2^20) of address space, and Intel delivered. A quick look at the pinouts of an Intel 8086 & 8088 processor reveals a 20 bit address bus. ![]()
0 Comments
Leave a Reply. |
AuthorWrite something about yourself. No need to be fancy, just an overview. ArchivesCategories |